1. Field of the Invention
The present invention relates to a semiconductor device for automatically detecting an external interface voltage, specifically, to a semiconductor device for automatically detecting an external interface voltage, which automatically detects an external interface voltage to control the input and output buffers of a semiconductor chip, developed for a specific voltage, so that the semiconductor chip can be used in an external environment set for the external interface voltage different from the internal supply voltage of the semiconductor chip.
2. Discussion of Related Art
The supply voltage of a semiconductor chip (for example, DRAM), currently being developed, is generally set to 3.3V, and thus the magnitude of transistor of its output buffer is determined on the basis of 3.3V of external voltage. When the DRAM having this characteristic is used for a system together with other chip such as CPU, there is a case where the DRAM's output buffer, designed for 3.3V, should make an interface with an external voltage of 5.0V. At this time, when a connection line (data input/output line) between the chips which use CMOS logic fully swings from 0V to Vcc, the connection line is charged with Vcc in case that a logic "high" is written into the DRAM.
Accordingly, when a logic "low" is read from the DRAM after the writing of logic "high", the output buffer of pull-down transistor must discharge the charges in the connection line, to make the connection line 0V. The amount of charge in the connection line of the DRAM when the Vcc is 5.0V is much larger than that in case of 3.3V of Vcc. Thus, it takes longer time to discharge the 5.0V of data input/output line because the pull-down transistor of DRAM for 3.3V is designed to decrease the potential of the data input/output line charged with 3.3V to 0V for a predetermined period of time. Accordingly, the DRAM operates under a given specification in 3.3V environment, whereas it does not operate normally in the specification of 5.0V environment.